This invention relates to a programmable read only memory device (PROM) and more particularly to an integrated circuit semiconductor PROM comprised of an array of closely packed memory cells each utilizing a single transistor element.
Semiconductor read only memory (ROM) devices which are permanently programmed during fabrication are well known. Fusing techniques after fabrication wherein an electrical pulse is used to permanently and irreversably destroy selected interconnection lines to provide the desired programming of a device have also been widely used. The advantages including increased versatility of a ROM that is reprogrammable after fabrication are readily apparent. Previous attempts to provide such a programmable ROM device included the use of charge storage in a portion of the gate dielectric of one or more MOSFET's (metal-oxide-silicon-field effect transistor) which comprised the memory cell. Here, memory storage was achieved by electron injection and trapping in regions of sandwiched gate dielectrics by suitably applied gate voltages. Non-destructive reprogramming was accomplished by changing polarity of the gate voltage on preselected cells of the device. A further development in the field of reprogrammable ROM devices involved the so-called floating gate avalanche injection MOS (FAMOS) structure. Examples of such devices may be found in U.S. Pat. Nos. 3,660,819 and 3,755,721. Here, a memory cell was programmed by charge transport to the floating gate by avalanche injection of electrons from source-substrate or drain-substrate junctions. However, the FAMOS devices heretofore devised or proposed require that each cell have essentially a planar layout on the semiconductor chip wherein the floating gate region was essentially parallel to the surface of the device itself and extended over spaced apart diffused regions in the conventional manner. This arrangement required a substantial amount of chip area for each PROM cell, and since such PROM devices normally utilize a large number of cells, the overall area of such prior devices was considerable. The present invention provides a solution to this problem by providing a reprogrammable ROM or PROM wherein the area required for each memory cell is much lower than heretofore required for such devices.